The present invention generally relates to a TV receiver with selectable signal processing systems.
In recent years, as the progress of the digital technique, digital technique application products have been widely spread in consumer goods. The TV receiver is not exception to such consumer goods. That is, the digital techniques are used in various picture processing systems dedicated to the TV receiver beginning with a teletext decoder and a high picture quality three-dimensional Y/C separator.
Further, multimedia technique application products based on an MPEG or an Internet architecture are on their way of developing.
FIG. 10 shows a block diagram of a conventional TV receiver having such various functions as described above. While FIG. 11 shows a display example obtained by such a TV receiver. The configuration of the conventional TV receiver will be described hereinafter in reference to FIGS. 10 and 11.
A video signal is input to an input terminal 1001. The input video signal is decoded in an NTSC video decoder 1002, so that three of Y, I and Q signals are supplied to a picture size compressor 1011.
In the NTSC video decoder 1002, first, a signal is divided into the luminance signal and the chrominance signal in a three-dimensional Y/C separator 1004. A RAM 1003 is used for causing a three-dimensional frame delay.
A color signal is decoded by a color decoder 1005, then two chrominance signals I and Q are obtained from the color decoder 1005.
Further, a separation of horizontal and vertical synchronizing signals are implemented by a synchronous separation circuit (not shown).
And, not shown in FIG. 10, the conventional TV receiver further includes fine adjustment control arrangements comprising an ACC, a hue control and a picture quality control etc, which are commonly comprised in ordinary TV receivers.
The decoded NTSC signal is compressed or expanded to a proper picture size in the picture size compressor 1011. For a full screen picture display the picture size may be compressed or expanded in a nonlinear manner to change compression rates at the center or the sides of the screen.
A RAM 1012 is used for aligning time of signals before and after the compression. For compressing to, e.g., one half, the number of pixels during one horizontal scanning period are reduced to one half, so that the RAM 1012 operates to output two same pixels.
To an input terminal 1006, a video signal for a second channel is input. The second input video signal is decoded to three of Y, I, Q signals as described above in an NTSC video decoder 1007.
The decoded signal is then compressed to a proper picture size in a picture size compressor/frame synchronizer 1010 wherein the decoded signal is further phase-synchronized with the video signal on the first channel supplied through the input terminal 1001.
In more detail, the decoded signal may be written into a RAM 1009 by being synchronized with the second video signal from the input terminal 1006 for a write-in in time. The decoded signal may also be read out from the RAM 1009 by the clock which is phase-synchronized with the video signal on the first channel input through the input terminal 1001 for a read out time.
To an input terminal 1013, still another video signal is input. The third input video signal is decoded in a teletext decoder 1014 to extracts a teletext data therefrom. An input processor 1015 extracts the teletext data multiplexed on the 10th horizontal scanning line of the input video signal, and then stores the extracted data in a RAM 1017. The input processor 1015 often includes an error corrector or a waveform equalizer to improve an anti-ghost performance or an anti-noise performance.
The stored data are decoded using a CPU 1016, the RAM 1017 and a ROM 1018, and thus then picture data are formed and stored in the RAM 1017.
A memory controller 1036 reads out the picture data properly. Accordingly, the RAM 1017 is used not only for temporary data storage but for graphic memory.
The ROM 1018 stores the programs for processing and the data for character display, so-called a character font.
For the teletext receiver, the display data has a non-real time property. Thus the picture size compressor/frame synchronizer 1010 used for NTSC signal processing as described above is not necessary. Signals are usually processed by a software because of its non-real time property.
It is possible to synchronize the display data with the data on the first channel by synchronizing the read out operation of the memory controller 1036 with the synchronizing signal of the data on the first channel.
Here, the input terminal 1013 is described to be independent of the input terminals 1001 and 1006. However, this video signal is not necessary to be independent of the signals input to the input terminals 1001 and 1006.
On the other hand, to an input terminal 1019 an MPEG bit stream is input. The digital broadcast has started since 1996 in this country, so that the digital video stream has begun to take the place of the analog signal.
The MPEG can be classified into a MPEG-1 represented as a video DC and a MPEG-2 represented by the digital broadcast as described above. Further, the MPEG-2 bit stream is classified into a TS (transport stream) and a PS (program stream).
Generally, devices capable of decoding the MPEG-2 pictures are capable of decoding the MPEG-1 pictures too.
The TS is basically applied for broadcast uses, while the PS is applied for package media such as a DVD.
Here, it is assumed that the PS is input to the input terminal 1019. An MPEG decoder 1020, as same as the teletext receiver, generally tends to process the high-speed processing part such as a CDT (discrete cosine transform) in its dedicated circuit, and to process others in the software such as a CPU.
Accordingly, not shown in the drawings, the MPEG decoder 1020 often includes a CPU. The decoded MPEG signal is implemented the synchronizer or the picture size compression processing in a picture size compressor/frame synchronizer 1038 and a RAM 1039 to establish the synchronization with the first channel as same as the NTSC picture decoder.
An input terminal 1022 is coupled to a telephone line, and thus an Internet terminal unit/graphic engine designated by 1023 is able to access Internets. The signal from the telephone line is converted into the digital signal in a modem 1024. In the modem 1024 the processing related to the modulation such as a flow control and error correction not only the signal conversion.
The processing after this process is similar to the operation of the teletext decoder 1014.
The digital signal from the modem 1024 is stored in a RAM 1027 via a CPU 1025 and a memory controller 1026. Then, according to the processing program stored in an ROM 1028 the digital signal is decoded by the RAM 1027 and the CPU 1025, so that the picture display data is formed and then stored in the RAM 1027.
The memory controller 1026 reads out the picture display data property from the RAM 1027 to output the picture. Accordingly, the RAM 1027 is used not only for the temporary data storage for processing but for the graphic memory.
The ROM 1028 stores the program for processing and the character display data, so-called the character font.
The display data has a non-real time property in similar to the teletext data. Thus it is possible to process the most of the display data based on software, and also possible to synchronize with the first channel by aligning the read-out operation of the memory controller 1026 with the synchronizing signal of the data on the first channel.
A timing controller 1033 controls the read out timings of each picture in the picture size compressor 1011, the picture size compressor/frame synchronizer 1010, the teletext decoder 1014, the MPEG decoder 1020 and the Internet terminal apparatus unit/graphic engine 1023.
A main controller 1029 provides processing instructions to the timing controller 1033 and each decoder according to the control signal input through a control input terminal 1037. The control signal input through the control input terminal 1037 includes instructions from users as well as the system of the present TV receiver.
As shown in FIG. 10, the conventional TV receiver needs the dedicated units for each input to receive and reproduce various signals. This results to increase the circuit scale, so as to hike the cost of the product.
For developing LSIs, such a dedicated unit has a problem of increasing the chip size and also dissipates excessive powers, so as to be a serious impediment to a commercialization of such TV receivers. Further, if each circuit of the TV receivers is constructed with a full hardware configuration, it will lose a future extensibility and also becomes an impediment to the flexible product development.
When each unit as shown in FIG. 10 are operated at the same time, all receivable signals are displayed. Such kind of usage is limited in very few cases.
Further, when two or more channel signals are displayed simultaneously, the picture size of each channel signal will become smaller, as shown in FIG. 11. When the picture size decreases, the picture quality degradation such as some degree of the resolution will not be noticed.
However, if many pictures were simultaneously displayed, it is practically seldom that a viewer concentrates on those pictures at once. Thus if there were any degradation in the signal processing rate or various functions, the simultaneous display of many pictures will not cause a big problem.
It is, therefore, an object of the present invention is to provide a TV receiver with selectable signal processing systems which monitors the number, the type or the state of displayed pictures in reference to a situations of a multi-picture display, and deteriorates the signal processing efficiencies and functions in order of signals having lower priority according to the monitored result, and thus lowers its signal processing ability for each channel for serving the surplus of the signal processing resources to other signal processing.
In order to achieve the above object, a TV receiver with selectable signal processing systems according to first aspect of the present invention includes a programmable digital signal processor capable of changing the internal signal processing systems according to a signal processing control signal, an input signal monitor for monitoring at least any one of the number and the type of the input TV signals, and a signal processing controller for indicating the signal processing control signal to the signal processor according to the monitored result.
A TV receiver with selectable signal processing systems according to second aspect of the present invention includes a programmable digital signal processor capable of changing the internal signal processing systems according to a signal processing control signal, an input signal monitor for monitoring at least any one of the number, the type and the state of the displayed video signal, and a signal processing controller for indicating the signal processing control signal to the signal processor according to the monitored result.
A TV receiver with selectable signal processing systems according to third aspect of the present invention includes a programmable digital signal processor capable of changing the internal signal processing systems according to a signal processing control signal, an input signal monitor and a signal display monitor for monitoring at least any one of the number, the type and the state of the displayed video signal, and a signal processing controller for indicating the signal processing control signal to the signal processor according to both the monitor results.
Additional objects and advantages of the present invention will be apparent to persons skilled in the art from a study of the following description and the accompanying drawings, which are hereby incorporated in and constitute a part of this specification.